28th May 2018      
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PowerQUICC III

    
A signal processing board for use in a 3G Node-B environment. The control processor, a Motorola MPC8560 PowerQUICC III, with linear FLASH, 64 bit wide DDR SDRAM with ECC and capable of booting from either the on-board FLASH or via a Rapid I/O interface (from another board) operating at 200MHz. A Xilinx CPLD provided glue-logic functions and FPGA configuration from a number of sources. The digital signal processing was carried out by 5 Xilinx Virtex-II Pro FPGAs (XC2VP50, 1152 BGA) interfacing directly to the A/D and D/A converters connected to the radio system.

Due to the high speed of the digital clocks and signals and the DDR requirements this board used trace length matching and controlled impedance tracking as necessary, both single ended and differential. The number of signals and density of the board meant that this 24 layer board used 'blind' via technology. The topside of the board has heatsinks fitted to the PowerQUICC III and FPGA devices. The board is currently being manufactured in both Europe and the Far East. Photographs courtesy of www.ipwireless.com
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Qutec Systems Ltd.
Registered Office: The Old Church, Verulam Road St. Albans, Herts. AL3 4DH
Registration No. 1807115